The present invention relates to a non-volatile memory, particularly to an MFSFET (Metal-Ferroelectrics-Semiconductor-Field Effect Transistor) type memory.
Ferroelectrics researched now is divided largely in two. One is a type detecting reversion charge quantity of a ferroelectric capacitor and is constructed by a ferroelectric capacitor and a selecting transistor.
The other one is a memory detecting resistance change of a semiconductor caused by spontaneous polarization of ferroelectrics. The typical one of this type is MFSFET. This is an MIS structure using ferroelectrics at a gate insulation film. In this structure, it is needed to form directly ferroelectrics on a surface of a semiconductor, and it is very difficult to produce a memory element of good quality because boundary control of ferroelectrics and semiconductor is difficult. Although a memory structure providing a buffer layer at boundary of ferroelectrics and semiconductor is the main current now, we have proposed an FET of MFMIS structure set with a metal layer (M) and an insulation layer (I) at boundary of ferroelectrics/semiconductor as a buffer as shown in FIG. 4. The FET of MFMIS structure is constructed by laminating a gate oxide film 5, a floating gate 6, a ferroelectrics 7, a control gate 8 on a channel domain 4 formed between source drain domains 2 and 3 of a semiconductor substrate 1 in order.
In this structure, the semiconductor substrate 1 is usually grounded, and the ferroelectrics 7 generates polarization inversion by applying positive voltage to the control gate 8. Even if voltage of the control gate 8 is removed, negative charge generates at a channel forming domain CH by residual polarization of the ferroelectrics 7. This state is placed with the state of xe2x80x9c1xe2x80x9d.
Conversely, by applying negative voltage to the control gate 8, the ferroelectrics 8 generates polarization inversion to reverse direction. Even if voltage of the control gate 8 is removed, positive charge generates at a channel forming domain CH by residual polarization of the ferroelectrics 8. This state is placed with the state of xe2x80x9c0xe2x80x9d. Thus, writing data xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d to the FET can be carried out.
Reading the written data is carried out by applying reading voltage Vr to the control gate. The reading voltage Vr is set at value between threshold voltage Vth1 in the state xe2x80x9c1xe2x80x9d and threshold voltage Vth0 in the state xe2x80x9c0xe2x80x9d. When voltage Vr is applied to the control gate 8, whether written data is xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d can be judged by detecting whether drain current flows or not.
Thus, according to the FET of the MFMIS structure, one memory cell can be constructed with one element, and it becomes possible to carry out non-destructive reading excellently.
However, the FET of such the structure has the following problem. At writing, the FET has a form where a capacitor Cf (capacitance is Cf) formed by the ferroelectric film 7 and a capacitor Cox (capacitance is Cox) formed by the gate oxide film 5 (See FIG. 5). Therefore, when voltage V is applied between the substrate 1 and the control gate 8, voltage is divided in Vf and Vox and is expressed by the following expression (1).
V=Vf+Vox
CfVf=CoxVox=qxe2x80x83xe2x80x83(1)
q: generated charge quantity of the capacitor Therefore, divided voltage Vf shown in the following expression is applied to the capacitor Cf formed by the ferroelectric film 7.
Vf=Vxc2x7Cox/(Cf+Cox)xe2x80x83xe2x80x83(2)
On the other hand, it needs to make Vf high some degree in order to let the ferroelectric film 7 carry out polarization inversion at writing.
Therefore, it needs to make capacitance of the ferroelectric film to capacitance of the gate insulation film small. However, there is a problem that dielectric constant of PZT is about 200 to 1000 for example, so it is considerably higher than dielectric constant 3.9 of silicon oxide film constructing the gate insulation film.
Because of that, it is difficult to make Vf high in the above expression (1). Therefore, there is a problem that polarization inversion of the ferroelectric film 7 at writing.
In order to solve the problem, it needs to make dielectric constant of the ferroelectric film as small as possible and make film thickness thin. Thus, although it is possible to make the divided voltage Vf by making film thickness thin, on the other hand, as film thickness becomes thin, leakage current appears between the floating gate and the control gate, and that causes deterioration of memory characteristic.
The invention is carried out in view of the above-mentioned condition, and the object is to design decrease of leakage current and improvement of data holding characteristic of memory characteristic.
The invention is characterized by including FET of MFMIS structure letting metal layer (M) and insulator layer (I) stand at boundary of ferroelectric and semiconductor, and further by letting an insulation barrier layer between a floating gate or a control gate and a ferroelectric layer.
That is, a first memory of the invention is characterized by comprising an FET having MFMIS structure laminating in order a floating gate a ferroelectric layer, and a control gate on surface of a semiconductor substrate between source-drain domains formed on the surface of a semiconductor substrate through a gate insulation film, wherein the insulation barrier layer stands between said floating gate or said control gate and said ferroelectric layer.
According to such the construction, since the insulation barrier layer stands between the floating gate or the control gate and the ferroelectric layer, leakage current between the floating gate and the control gate is decreased and it is possible to obtain good memory characteristic.
The second invention is characterized in that said insulation barrier layer comprises insulation material including composition elements of said ferroelectric film in the nonvolatile memory according to the first invention.
According to such the construction, adding to effect by the above-mentioned first invention, because said insulation barrier layer includes composition elements of said ferroelectric film, diffusion of said elements from said ferroelectric film is prevented at use for long time and diffusion of composition elements from the insulation barrier layer too is prevented so as to design a long life.
In the third invention, said insulation barrier layer is characterized by standing between said ferroelectric layer and said control gate in the nonvolatile memory according to any of the first invention and the second invention.
By such the construction, since the insulation barrier layer may be formed on the upper surface of said ferroelectric film, the construction does not cause disturbing orientation at forming the ferroelectric film.
In the fourth invention, said insulation barrier layer is characterized by standing between said floating gate and said ferroelectric layer in the nonvolatile memory according to any of the first invention and the second invention.
By such the construction, when the insulation barrier layer stands between said floating gate and said ferroelectric layer, it is possible to construct with material narrowing difference of the lattice constant between that of said floating gate and that of said ferroelectric film.
Desirably, the invention is characterized in that said ferroelectric film is constructed with the STN (Sr2(Ta1xe2x88x92xNbx)2Oy), x: 0 less than x less than 1, y: 0 less than y, and said insulation barrier layer is constructed by tantalum oxide (Ta2O5) according to any of the first invention and the second invention.
Dielectric constant of the STN is about 40 to 50, and dielectric constant of tantalum oxide is about 25. Therefore, voltage falling of tantalum oxide itself is small, and it is possible to design decrease of leak current without falling largely voltage applied to the ferroelectric film. Furthermore, since said tantalum oxide includes tantalum being composition elements of the ferroelectric film, diffusion of tantalum from the ferroelectric film so as to obtain higher nonvolatile memory in reliability.
The fifth invention is characterized in that said ferroelectric film is constructed with the STN (Sr2(Ta1xe2x88x92xNbx)2Oy), x: 0 less than x less than 1, y: 0 less than y, and said insulation barrier layer includes at least one oxide of composition elements of said ferroelectric film.
According to such the construction, there is not diffusion of composition elements from the insulation barrier layer to the ferroelectric film so as to obtain good memory characteristic.
The sixth invention is characterized in that said insulation barrier layer is constructed so as to satisfy the following expression when tin is placed for film thickness thereof, xcex5in for dielectric constant, tf for film thickness of said ferroelectric film, and xcex5f for dielectric constant of the ferroelectric film.
(xcex5f/tf) less than (xcex5in/tin) less than 2(xcex5f/tf)
According to such the construction, voltage falling rate by standing of the insulation barrier layer is depressed ⅓ to xc2xd, it is possible to insure voltage applied to the ferroelectric film largely enough. That is, voltage Vin applied to the insulation barrier is expressed the following expression.
Vin=(Cf/Cin+Cf)/Vxe2x80x83xe2x80x83{circle around (1)}
Here, as Cf=xcex5f/tf, Cin=xcex5in/tin,
by substituting for (xcex5f/tf) less than (xcex5in/tin) less than 2(xcex5f/tf), the following expression is obtained,
Cf less than Cin less than 2Cf
by substituting this expression for the above expression (1),
voltage applied to the insulation barrier becomes like the following expression.
⅓V less than Vin less than xc2xdV
The seventh invention is characterized in that band gap of said insulation barrier layer is larger than band gap of the ferroelectric film.
The eighth invention is characterized in that said insulation barrier layer includes oxide or nitride of composition elements of said ferroelectric film.
In the ninth invention, said insulation barrier layer is a tantalum oxide layer.
In the tenth invention, said insulation barrier layer is a titanium oxide layer.
In the eleventh invention, said insulation barrier layer is titanium, tantalum, zirconium, tungsten, or nitride of these substances.
In the twelfth invention, said insulation barrier layer is nitride of matter including aluminum, silicon, and the like in nitride of high melting point such as TaAlN, TaSiN, and the like.
In the thirteenth invention, said floating gate is two layers film of iridium layer and iridium oxide layer.
In the fourteenth invention, said control gate is two layers film of iridium layer and iridium oxide layer.
The fifteenth invention, said floating gate of two layers film of iridium layer and iridium oxide layer is formed on surface of a semiconductor substrate.
As described above, it is possible to use oxide of high melting point metal such as titanium (Ti), tantalum (Ta), zirconium (Zr), tungsten (W), and so on, oxide nitride of the high melting point metal, or film including them for an insulation barrier.
Titanium oxide is good in adhesion with electrode metal such as iridium, iridium oxide, platinum, ruthenium, and so on, and adhesion between a floating gate or a control gate and a ferroelectric layer can be improved. When iridium (Ir) is included for the control gate, oxygen, lead (Pb), and zirconium (Zr) in PZT do not get out of the PZT especially, and there are not aging and change of repeating of polarization inversion so as to keep good ferroelectricity. Further, it is effective especially when the control gate includes two layers structure film of iridium and iridium oxide.
Moreover, said high melting point metal or said nitride of high melting point metal is formed after forming process of the ferroelectric layer, and by oxidizing this, the insulation barrier may be formed. For example, when the ferroelectric film is formed Sol-Gel method, titanium is formed thin by method such as spattering before annealing process, and both may be oxidized at the same time in the annealing process. Although annealing temperature at forming the ferroelectric film by Sol-Gel method is about 400xc2x0 C., after that, by raising the temperature to about 700xc2x0 C. in oxygen atmosphere in the chamber as it is, baking process and annealing process of the ferroelectric film are carried out continuously effectively so as to form good titanium oxide film. Titanium becomes titanium oxide by the annealing process so as to have a structure with an excellent barrier.
According to such the construction, it is possible to form very easily an insulation barrier layer having high barrier effect in reliability.
Iridium is material enabling to keep orientation of the ferroelectric film formed on the upper layer thereof good. On the other hand, there is a problem that iridium is columnar polycrystal and high in permeability, that is, a problem to permeate oxygen in the ferroelectric film and another elements. However, a dense insulation barrier layer consisting of titanium oxide of the lower layer can obtain strong barrier effect.
Further, since the titanium oxide layer is very dense, high in barrier performance, and dielectric constant is large, about 80 to 100. Therefore, voltage falling ratio is low and it is possible to keep characteristic for long time.
Dielectric constant of tantalum oxide is about 20 to 30.
Dielectric constant of zirconium is about 12.5.